Parker Bros Bankswitch


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pb multicart

I've had some luck in building bankswitch circuits out of standard logic gates, but the Parker Brothers E0 method always seemed too complex. Then, one day while searching USENET archives, I came upon a 1996 posting from Kevin Horton (at bottom of page) which described a possible way to do it with three standard logic chips plus an inverter.

I wanted to figure out a similiar circuit that didn't need the extra inverter and also didn't use a 7431 which is no longer available. Finally came up with the schematic below and made a multicart with all the E0 bankswitching games:

  1. Ewok Adventure (converted to ntsc by Thomas Jentzsch)
  2. Lord of the Rings
  3. Death Star Battle
  4. Gyruss
  5. James Bond 007
  6. Super Cobra
  7. Tutankham
  8. Popeye
  9. Star Wars Arcade
  10. Q*Bert's Qubes
  11. Frogger 2
  12. Montezuma's Revenge
  13. Mr Do's Castle
  14. Tooth Protectors

Special thanks to Kevin Horton for the original circuit, Thomas Jentzsch for the Ewok conversion, and Christian Scott for finding the Ewok artwork.

WILL I MAKE THESE TO SELL?
No, My limited time is spent on doing new projects for the website. Besides, doing something more than once is boring.

CAN SOMEONE ELSE SELL CARTS USING THIS SCHEMATIC?
I really don't care myself, most of the design comes from Kevin who described it in a public forum seven years ago. However, if you make boxed Ewok or LOTR repro carts, I'd like to be credited in the instructions. And if you want to give me one out of appreciation, I wouldn't say no (Kevin probably wouldn't either).

Just don't be surprised if the Lucas or Tolkien lawyers sue your ass off. Those guys don't mess around.

 

Parts List:
  CD4068  8-input AND/NAND gate with complementary outputs.
          Y = ABCDEFGH

  74265   Dual buffer/inverter plus dual AND/NAND gates.
          1Y=1A  2Y=2A.2B  3Y=3A.3B  4Y=4A

  74170   4x4-bit open-collector dual-port register file.

  10k pullup resistors
  100 ohm resistor
  1000pf (0.001uf) capacitor

Schematic:


                        +---+--+---+
     _________________Y |1  +--+ 14| VCC_______5v    
    |    A12__________A |2       13| /Y
    |    A11__________B |3       12| H_________A8
    |    A10__________C |4  4068 11| G_________A7
    |     A9__________D |5       10| F_________A6
    |                   |6        9| E_________A5
    |    gnd________GND |7        8|
    |                   +----------+
    |
    |
    |                   +---+--+---+
    |________________1A |1  +--+ 16| VCC_______5v 
    |         100    1Y |2       15| 4A________A12
 ,> | <<____,_/\/\__/1Y |3       14| 4Y   
 |  |       |________2A |4   74  13| /4Y_______ eprom enable
 |  |________________2B |5  265  12| 3B________A10
 |                   2Y |6       11| 3A________A11
 |       ,__________/2Y |7       10| 3Y_____________________,
 |       |    gnd___GND |8        9| /3Y                    |
 |       |              +----------+                        |
 |       |                                                  |
 |       |____________________________________________,     |
 |                                                    |     |
--- 1000pf                                            |     |
---                     +---+--+---+                  |     |
 |         A1________D2 |1  +--+ 16| VCC_______5v     |     |
 |         A2________D3 |2       15| D1________A0     |     |
gnd                  D4 |3       14| WA0_______A3     |     |
          A11_______RA1 |4   74  13| WA1_______A4     |     |
          A10_______RA0 |5  170  12| /WR______________'     |
                     Q4 |6       11| /RD____________________'
eprom A12 + 5v pu____Q3 |7       10| Q1________eprom A10 + 5v pullup
          gnd_______GND |8        9| Q2________eprom A11 + 5v pullup
                        +----------+

Note: 1000pf cap connects to 100 ohm resistor



How It Works:
Most of this theory came from Kevin Horton's Sizes.txt which
is the bible for anyone interested in 2600 bankswitching (and also
where I found what games used the PB method). The Parker Brothers E0
bankswitch convention is fairly involved.  It's best to study the read
half, then the write half.  For reading, the 4k address space of the
cart is divided into four 1k segments and the rom is divided into 8 1k
slices.  The first three three segments can be set to point to any of
the slices.  The last segment always points to the last slice.

The slice values are set for the first three segments by accessing
certain addresses.  Hopefully the address chart below makes everything
clearer.  Notice that A11/A10 for reading correspond to A4/A3 for
writing and both contain the segment number.  Also A2/A1/A0 in writing
correspond to the rom slice number. In addition A12-A5 can be seen as
a write enable because the pins are always high for the write operations.
If you study all this with Kevin's post, it should become clear.  

The 100 ohm resistor with a 1000pf cap to ground helps transform the
cycle-wide output of the AND gate to a short pulse.  They also provide
some delay and deglitching benefits.  50 and 200 ohm resistors
work on both a 2600 and 7800, so 100 ohms should be in the sweet
spot.  This circuit didn't work on my portable 2600, but that was
handwired and didn't have the exact 2600 schematic. 

For the chips above:
 4068 does the AND for A12-A5, 
 74265 channels 1 and 2 transform the level signal to a short pulse
 74265 channel 3 tristates the register file output during segment four    
 74265 channel 4 inverts the A12 cart enable to be an eprom enable 
 74170 stores the slice values for the 3 segments

     
    Address          Action 
 A AAAA AAAA AAAA
 1 1198 7654 3210
 2 10     

 1 0000 0000 0000  Start of segment 0 and cartridge address space  
 1 0011 1111 1111    End of segment 0
 1 0100 0000 0000  Start of segment 1
 1 0111 1111 1111    End of segment 1
 1 1000 0000 0000  Start of segment 2
 1 1011 1111 1111    End of segment 2
 1 1100 0000 0000  Start of segment 3
 1 1111 1111 1111    End of segment 3 and cartridge address space

 1 1111 1110 0000  set segment 0 to rom slice 0
 1 1111 1110 0001  set segment 0 to rom slice 1
 1 1111 1110 0010  set segment 0 to rom slice 2
 1 1111 1110 0011  set segment 0 to rom slice 3
 1 1111 1110 0100  set segment 0 to rom slice 4
 1 1111 1110 0101  set segment 0 to rom slice 5
 1 1111 1110 0110  set segment 0 to rom slice 6
 1 1111 1110 0111  set segment 0 to rom slice 7

 1 1111 1110 1000  set segment 1 to rom slice 0
 1 1111 1110 1001  set segment 1 to rom slice 1
 1 1111 1110 1010  set segment 1 to rom slice 2
 1 1111 1110 1011  set segment 1 to rom slice 3
 1 1111 1110 1100  set segment 1 to rom slice 4
 1 1111 1110 1101  set segment 1 to rom slice 5
 1 1111 1110 1110  set segment 1 to rom slice 6
 1 1111 1110 1111  set segment 1 to rom slice 7

 1 1111 1111 0000  set segment 2 to rom slice 0
 1 1111 1111 0001  set segment 2 to rom slice 1
 1 1111 1111 0010  set segment 2 to rom slice 2
 1 1111 1111 0011  set segment 2 to rom slice 3
 1 1111 1111 0100  set segment 2 to rom slice 4
 1 1111 1111 0101  set segment 2 to rom slice 5
 1 1111 1111 0110  set segment 2 to rom slice 6
 1 1111 1111 0111  set segment 2 to rom slice 7


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lotr on screen


KEVIN HORTON'S ORIGINAL POST (from rgvc, Jan 7 1996):

I managed to shrink down the PB bankswitching circuit from the reported 7 chips (never saw the original circuit) down to just 3. That's right, three normal TTL chips! I used a 7430 8-in NAND, a 7431 delay line/ inverter/buffer/NAND (Check out the GIICM for info on said chip) and a 74170 4*4 register file.

Note I haven't actually tried the circuit because I don't have a 74170 at the moment. ;-) I'm pretty sure it'll work, tho- the idea is sound.

Basically what happens is the 7430 is set up to go low when A5 thru A12 are all high. This gets me to the 1FE0 to 1FFF part easily. Next, the 74170 4*4 reg file stores the four 1K bank selections. This is a very neat chip. It's basically a 16 bit dual-port RAM. It has 2 address and data lines for both a read and a write half. Pretty spiffy. There's also a /WE and a /RD line as well. Anyway, A0-A2 go to the D0-D2 lines of the write half of the memory. A3 and A4 go to the WA and WB address inputs, respectively. What this allows me to do is store a 3-bit word in 1 of 4 locations- the 4 1K banks in a typical PB ROM. A10 and A11 go to the RA and RB read addresses to determine which register to read. These correspond to the 4 1K blocks in the PB ROM. The data outputs of the 74170 will point to the proper bank for the selected address range. What about the 4th 1K range always pointing to bank 7 you say? Well, I used one of the 2-in NANDs from the delay line with an inverter (from the same chip) on the output to the /RD pin of the 74170. The 2 inputs go to A10 and A11. Also, there are pullup resistors on the outputs of the 74170. Basically what happens is when the 4th 1K block is selected, the output of the NAND goes low, which gets inverted, which shuts off the 74170's outputs. Since they are pulled up, it automagically selects bank 7! I used the remaining parts of the 7431 to make an edge detector. This detector senses the fall edge of the 7430's output and gives the /WE line of the 74170 a ~200ns pulse which latches the proper bank selection. The propagation delays in the 7430 insure a good 'read' of the address lines. The short pulse on the /WE line insures no glitches upset the bank selection and spoil the data. If it weren't there, there'd be big problems. Most notably, the address inputs to the 74170 would change by the time the 7430's output when back high. This is because of it's propagation delay. If the 74170 was edge-sensitive, I wouldn't have to had this circuit.

I make no guarantees, but I'm 99.9% sure it'll work as specified. I don't know how it wouldn't! It's intresting to note that this circuit requires one less chip than the 16K FF6-FF9 circuit. ;-)

I have the schematic all ready to go in GIF format for anyone that wants it.

One note about the chips: You might have some problems finding these chips, most notably the 74170 and the 7431. I just happened to have a 7431 lying around, but I'm going to have to buy a 74170! 7430's are pretty common, tho.

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